Field of the Invention
The present invention relates to a printed wiring board with a built-in semiconductor element.
Description of Background Art
Japanese Patent Laid-Open Publication No. 2010-87085 describes a method in which an electronic component is embedded in a resin layer. According to Japanese Patent Laid-Open Publication No. 2010-87085, a through hole that penetrates two resin layers and reaches a conductor layer is formed. As illustrated in Japanese Patent Laid-Open Publication No. 2010-87085, a plating conductor is formed inside the through hole. The entire contents of this publication are incorporated herein by reference.